Once a semiconductor integrated circuit has been fabricated, the circuit is often tested to identify potential faults in the circuit. One type of test is known as input/output (I/O) characterization. During I/O characterization, the set up and hold times for each input of the integrated circuit and the minimum and maximum delays for each output of the integrated circuit are measured for all possible transitions on those inputs and outputs. The measured values are then compared to pre-determined specifications.
One method of performing I/O characterization is to couple the integrated circuit die to a tester which applies a series of patterns to the inputs of the integrated circuit that are selected to create each transition on each pin. However, generating all the possible transitions on the inputs and the outputs of a die running in a normal operating mode is often not a trivial task. In order to characterize an input or an output, the tester must be able to control that input or output and must be able to observe it. For a typical integrated circuit, it takes the test engineer a large amount of time to create the test patterns that are capable of generating all possible transitions on each input and output. Also, the test itself often consumes a large amount of tester time, which is expensive. Generating all possible transitions on each input and output can take a large number of clock cycles to accomplish.
Addition factors often further complicate I/O characterization. The integrated circuit cores that are being tested often do not come with a characterization plan. If the test engineer is not familiar with a particular design, it can be difficult to create a set of test patterns that control and observe the pins. Also as integrated circuit designs get larger, a particular signal may need to pass through many modules within the integrated circuit before it can be observed on an output pin. Some integrated circuit designs include ports that run asynchronously to the rest of the chip. These ports are extremely difficult to characterize. In addition, some integrate circuit designs are inherently difficult to characterize.
Improved I/O characterization methodologies are desired, which allow all possible transitions on each input and output to be created and observed more easily for measuring the input set up and hold values and the output minimum and maximum delay values in an automated way without requiring prior knowledge about the details of the design.